Department of Pattern Recognition

Research Report

Reconfigurable 24-Bit Floating-Point Coprocessor Demo

Kadlec Jiří, Daněk Martin, Honzík Petr

: ÚTIA AV ČR, (Praha 2004)

: Research Report 2116

: CEZ:AV0Z1075907

: GA102/04/2137, GA ČR, IST-2001-34016, RECONF2

: FPGA, dynamic reconfiguration, embedded HW

: 09G, 09H

: JC